1. Field of the Invention
The present invention relates generally to semiconductor packages having split die pad, and, more particularly, to semiconductor packages in which die pad is split into two or more segments, said split die pad segments being coupled to each other by a non-conductive resin or a multi-layer capacitor, thereby preventing a leakage of adhesive interposed between semiconductor chip and the die pad, and reducing electrical noise.
2. Description of the Prior Arts
Recently, there has been a trend to make modules and surface mounting packages compact and thin in order to give highly densed mounting semiconductor packages. In compliance with this trend, compact and thin packages such as TSOP (Thin Small Outline Package) or UTSOP (Ultra Thin Small Outline Package) had been developed, which are used mainly for main memory devices of computers.
The integration density of IC can be increased by increasing the semiconductor element and metal wiring counts, or by increasing the area of a semiconductor chip. However, as very large scale integrated (LSI) circuits tend to get more complex, there is a need to switch more output driver circuits simultaneously at a faster rate in order to increase the performance thereof. This increase in the switching rate results in an increase in the amount of electrical noise which is associated therewith, and this noise problem becomes more severe in connection with the increase in the input and output pin counts.
Noise (.increment.V) can be expressed by: EQU .increment.V=L(di/dt)
wherein, .increment.V is a size of noise,
L is an inductance, PA1 di is a change in current, and PA1 dt is a change in time.
As can be seen from the above equation, noise can be reduced by reducing either inductance (L) or the current change rate (di/dt). However, because the di/dt is a parameter related to the speed of the semiconductor elements and increases as the operation speed of the elements increases, inductance should be reduced in order to compensate the increase in the di/dt, or to reduce noise.
Inductance component of the semiconductor elements is mainly governed by the lead frame, the connecting means, such as bonding wires, for electrically connecting the chip with the lead frame, or bumpers. In general, because the plastic package contains lead frame made of alloy 42, or copper (for example, OLIN 194), and connecting means made of Au, inductance varies depending on the configuration of lead frame, or connection manner of Au wires.
FIG. 1 is a perspective view of a conventional semiconductor package. The package depicted in FIG. 1 is of corner power type, and has a structure that a semiconductor chip (12) is mounted onto die pad (11), and bonding pads (13a, 13b) are formed at opposite corners of the chip (12), said bonding pads (13a, 13b) being electrically connected through gold or copper wires (14) to inner leads (16) connected to ground terminal (hereinafter referred to as "Vss") and, to inner leads (17) connected to power terminal (hereinafter referred to as "Vcc"). Tiebars (15a, 15b), which are coupled to die pad (11) of lead frame, are connected either to Vss for the P type chip or, to Vcc for the N type chip.
For this package, the reduction of inductance has a limitation due to a long length of wires because the bonding pads are formed at the corners, although a plurality of parallel wires connect the Vcc and Vss to the chip.
FIG. 2 is a perspective view of a conventional center power type semiconductor package. The package depicted in FIG. 2 has a structure that a semiconductor chip (22) is mounted onto die pad (21), and bonding pads (23a, 23b) are formed at centers of opposite sides of the chip (22), said bonding pads (23a, 23b) being electrically connected through gold or copper wires (24) to inner leads (26a, 26b) connected to Vss, and to inner leads (27a, 27b) connected to Vcc. Tiebars (25a, 25b), which are coupled to die pad (21) of lead frame, are connected either to Vss for the P type chip, or to Vcc for the N type chip.
For this package, the reduction of inductance may be accomplished to some extent by forming inner leads (26a, 26b, 27a, 27b) connected either to Vcc or to Vcc at centers of opposite sides so as to reduce the length of these inner leads. Nevertheless, the reduction of inductance by virtue of the reduction of the length of inner leads is not sufficient to compensate the increase in noise due to the increase in the operation speed of elements.
FIG. 3 depicts another conventional semiconductor package having split die pad in order to avoid the problems associated with the packages depicted in FIG. 1 and FIG. 2.
With reference now to FIG. 3, a semiconductor chip (33) is mounted onto die pad (31) by an adhesive (32), and is electrically connected to inner leads (35) through gold or copper wires (34). The resin molding (36) is formed to provide a protection from external environment, for example moisture or heat, and outer leads (37) are modified, for example, J-bent in order to be suitable for the mounting on printed circuit board (not shown). Die pad (31) is split into two segments by disjunction part (39), and each segment is coupled to Vcc or Vss, respectively.
This type of semiconductor package has an advantage that noise can be reduced by distributing power supplied to the chip. However, it also has a severe disadvantage that the adhesive (32) interposed between the die pad (31) and the chip (33) leaks into the disjunction part (39) and causes a formation of crack (39a) of the molding resin (36), resulting eventually in a package failure.